Simple MOS Transistor
Electrical/Analog/Semiconductors
The NMOS model is a simple model of a n-channel metal-oxide semiconductor FET. It differs slightly from the device used in the SPICE simulator.
The model does not consider capacitances. A high drain-source resistance RDS is included to avoid numerical difficulties.
Some typical parameter sets are:
W L Beta Vt K2 K5 DW DL
[m] [m] [A/V^2] [V] [-] [-] [m] [m]
12.e-6 4.e-6 .062e-3 -4.5 .24 .61 -1.2e-6 -.9e-6 depletion
60.e-6 3.e-6 .048e-3 .1 .08 .68 -1.2e-6 -.9e-6 enhancement
12.e-6 4.e-6 .0625e-3 -.8 .21 .78 -1.2e-6 -.9e-6 zero
50.e-6 8.e-6 .0299e-3 .24 1.144 .7311 -5.4e-6 -4.e-6
20.e-6 6.e-6 .041e-3 .8 1.144 .7311 -2.5e-6 -1.5e-6
30.e-6 9.e-6 .025e-3 -4. .861 .878 -3.4e-6 -1.74e-6
30.e-6 5.e-6 .031e-3 .6 1.5 .72 0 -3.9e-6
50.e-6 6.e-6 .0414e-3 -3.8 .34 .8 -1.6e-6 -2.e-6 depletion
50.e-6 5.e-6 .03e-3 .37 .23 .86 -1.6e-6 -2.e-6 enhancement
50.e-6 6.e-6 .038e-3 -.9 .23 .707 -1.6e-6 -2.e-6 zero
20.e-6 4.e-6 .06776e-3 .5409 .065 .71 -.8e-6 -.2e-6
20.e-6 4.e-6 .06505e-3 .6209 .065 .71 -.8e-6 -.2e-6
20.e-6 4.e-6 .05365e-3 .6909 .03 .8 -.3e-6 -.2e-6
20.e-6 4.e-6 .05365e-3 .4909 .03 .8 -.3e-6 -.2e-6
12.e-6 4.e-6 .023e-3 -4.5 .29 .6 0 0 depletion
60.e-6 3.e-6 .022e-3 .1 .11 .65 0 0 enhancement
12.e-6 4.e-6 .038e-3 -.8 .33 .6 0 0 zero
20.e-6 6.e-6 .022e-3 .8 1 .66 0 0
References: Spiro,H.: Simulation integrierter Schaltungen. R. Oldenbourg Verlag Muenchen Wien 1990.